The use of Phase Locked Loop (PLL) circuits in electronic circuits is widespread throughout the field of electronics. For radar applications, particularly but not exclusively in the automotive industry, users of the PLLs in a radar device require particular operational parameters in order to achieve certain operational goals using the radar device. In this respect, known existing XOR-PLLs are designed for so-called Long Range Radar (LRR) applications where output signal modulation is relatively slow. However, as the modulation speed increases, phase noise of the radar device becomes increasingly important, because the phase noise affects noise density at a receiver IF output of the radar device. In this respect, so-called Short Range Radar (SRR) radar transmitters operate at a higher modulation frequency than LRR radar transmitters, for example 38 GHz vs. 77 GHz. Furthermore, radar devices can be required to support both LRR and SRR functionality and for such requirements, the Voltage Controlled Oscillator (VCO) of the PLL of the radar device requires a large frequency tuning range, for example around 10 GHz, at a relatively high tuning range voltage, for example around 5V.
In order to satisfy such performance requirements, the PLL can be a so-called charge pump PLL. However, a charge pump PLL comprising a charge pump formed solely from Field Effect Transistor (FET) devices is unable to satisfy the above-mentioned performance requirements due to the fact that the FET devices have limited switching speeds and require a standard supply voltage. Bipolar-Complementary Metal Oxide Semiconductor (BICMOS) circuits are known to overcome such encumbrances, but known BICMOS charge pump circuits nevertheless suffer from limited upper frequency range responses due to current derivation on the supply and ground of the charge pump circuit taking time to settle to a steady state.